|
Signal
| Pin
| | Pin
| Signal
|
| | | | |
VREF_DEBUG | 1 | | | 2 | TMS |
TCK0 | 3 | | | 4 | TDO |
TDI | 5 | | | 6 | Reset Out |
Reset In | 7 | | | 8 | No Connect |
TRST_N | 9 | | | 10 | PREQ_N |
PRDY_N | 11 | | | 12 | VREF_TRACE |
PTI_0_CLK | 13 | | | 14 | PTI_1_CLK |
POD_PRESENT1_N | 15 | | | 16 | GND |
POD_PRESENT2_N | 17 | | | 18 | PTI_1_DATA[0] |
PTI_0_DATA[0] | 19 | | | 20 | PTI_1_DATA[1] |
PTI_0_DATA[1] | 21 | | | 22 | PTI_1_DATA[2] |
PTI_0_DATA[2] | 23 | | | 24 | PTI_1_DATA[3] |
PTI_0_DATA[3] | 25 | | | 26 | PTI_1_DATA[4]/PTI_2_DATA[0] |
PTI_0_DATA[4] | 27 | | | 28 | PTI_1_DATA[5]/PTI_2_DATA[1] |
PTI_0_DATA[5] | 29 | | | 30 | PTI_1_DATA[6]/PTI_2_DATA[2 |
PTI_0_DATA[6] | 31 | | | 32 | PTI_1_DATA[7]/PTI_2_DATA[3] |
PTI_0_DATA[7] | 33 | | | 34 | No Connect |
PTI_0_DATA[8]/PTI_3_DATA[0] | 35 | | | 36 | Boot Stall |
PTI_0_DATA[9]/PTI_3_DATA[1] | 37 | | | 38 | CPU Boot Stall |
PTI_0_DATA[10]/PTI_3_DATA[2] | 39 | | | 40 | Power Button |
PTI_0_DATA[11]/PTI_3_DATA[3] | 41 | | | 42 | PWRGOOD |
PTI_0_DATA[12]/PTI_3_DATA[4] | 43 | | | 44 | No Connect |
PTI_0_DATA[13]/PTI_3_DATA[5] | 45 | | | 46 | No Connect |
PTI_0_DATA[14]/PTI_3_DATA[6] | 47 | | | 48 | I2C_SCL |
PTI_0_DATA[15]/PTI_3_DATA[7] | 49 | | | 50 | I2C_SDA |
TCK1 | 51 | | | 52 | reserved by TRACE32 (Trace off) |
HOOK[9] | 53 | | | 54 | DBG_UART_TX |
HOOK[8] | 55 | | | 56 | DBG_UART_RX |
GND | 57 | | | 58 | GND |
PTI_3_CLK | 59 | | | 60 | PTI_2_CLK |
| | | | |
Connect metal plate to GND |