Nexus Target Adaptation for DesignWare ARC Trace

The adaptation applies for the following TRACE32 products:

Order No.	Probe
LA-3316	Trace for ARC® via AUTOFOCUS II (PACK)
LA-3913	Preproc. for ARC/AUTOFOCUS II 600 Flex out of production

Tyco Part Number	Description
2-5767004-2	Vertical, surface mount, board to board/cable connector, RoHS compliant.
767054-1	Vertical, surface mount, board to board/cable connector.
767061-1	Vertical, surface mount, board to board/cable connector.
5767044-1	Right angle, straddle mount, board to board/cable connector, RoHS compliant.

Link to Tyco Electronics

The adaptation uses one or two 38 pin Mictor connectors.
The second connector is only needed if the target trace port provides more than 16 trace data pins and for 8/16 bit demuxed mode.
A separation distance of 1350 mil is required if adaption without flex cable is intended.
We recommend to place the even numbered pins at the PCB border side (flex cable won't be twisted).

The pinout of the Mictor connector optionally includes the debug signals which needs to go to the Debug Cable
(20-pin standard header). The Preprocessors have a 20-pin connector where the user can plug in the Debug Cable.
Alternatively the Debug Cable can be plugged on a separate 20-pin connector on the target. In this case there is no
need to connect the debug signals to the Mictor. For better signal quality it is better not to connect them.
The debug signals are TDI, TDO, TMS, TCK, RTCK, TRST-, EVTI, EVTO, SRST-, VREF-DEBUG.

Pin	Direction	Description
TCK|TCKC	to CPU	JTAG Clock. It is recommended to put a pull-down to GND on this signal.
TMS	to CPU	Standard JTAG TMS: It is recommended to put a pull-up to VTREF on this signal for standard 4-pin JTAG.
TMSC	to/from CPU	Compact JTAG TMSC: Your chip should have a bus-hold on this line for compact JTAG.
TDI	to CPU	JTAG TDI. It is recommended to put a pull-up to VTREF on this signal. Only required for standard 4-pin JTAG / Optional signal for compact JTAG.
TDO	from CPU	JTAG TDO. (No pull-up or pull-down is required.) Only required for standard 4-pin JTAG / Optional signal for compact JTAG.
TRST-	to CPU	JTAG Testport Reset. (Optional, No pull-up or pull-down is required.)
RTCK	from CPU	JTAG Return Clock. (Optional, No pull-up or pull-down is required.)
VREF-DEBUG	from CPU	Reference voltage. This voltage should indicate the nominal HIGH level for the JTAG pins. So for example, if your signals have a voltage swing from 0 V ... 3.3 V, the VREF-DEBUG pin should be connected to 3.3 V.
SRST-	to/from CPU	System Reset Signal. (Optional) If your target board has a low active CPU reset signal, you can connect this low active reset signal to this pin. This enables the debugger to detect a CPU reset. Furthermore the debugger can drive this pin to GND to hold the CPU in the reset state. The debugger drives this pin as open-drain, so a pull-up is mandatory.
EVTI	to CPU	Nexus Event In (Optional) Transition to 1 forces a Nexus Synchronization Message
EVTO	from CPU	Nexus Event Out. (optional) This pin is not used by ARC processors.

Pin	Direction	Description
MKCO	from CPU	Nexus Message Clockout. (The trace clock.) This pin is mandatory and have to be on its dedicated position.
MSEOx	from CPU	Nexus Message Start/End Out. These signals controlling the transitions between the state in the Nexus state machine. The signals are mandatory. With TRACE32 command Analyzer.REMAP you can move them to the location of any MSEO or MDO pin.
MDOx	from CPU	Nexus Message Data Out. (Trace data signals.) Depending on the build configuration of the ARC trace block, you need 4, 8, or 16 MDO lines. With TRACE32 command Analyzer.REMAP you can move them to the location of any MSEO or MDO pin.
VREF-TRACE	from CPU	Reference voltage. This voltage should indicate the nominal HIGH level for the trace pins. So for example, if your signals have a voltage swing from 0 V ... 3.3 V, the VREF-TRACE pin should be connected to 3.3 V. This pin is mandatory and have to be on its dedicated position.

Connector "TRACE A"

Signal	Pin			Pin	Signal
N/C	1			2	N/C
N/C	3			4	N/C
N/C	5			6	MCKO
EVTI (opt.)	7			8	EVTO (opt.)
SRST- (opt.)	9			10	N/C
TDO	11			12	VREF-TRACE
RTCK (opt.)	13			14	VREF-JTAG
TCK | TCKC	15			16	MDO7
TMS | TMSC	17			18	MDO6
TDI	19			20	MDO5
TRST- (opt.)	21			22	MDO4
MDO15	23			24	MDO3
MDO14	25			26	MDO2
MDO13	27			28	MDO1
MDO12	29			30	MDO0
MDO11	31			32	GND
MDO10	33			34	GND
MDO9	35			36	MSEO1
MDO8	37			38	MSEO0
Connect Pin 39,40,41,42,43 to GND

VCC needs to have VREF-TRACE level.

Connector "TRACE B"

The second connector is not used.

Connector "TRACE A"

Signal	Pin			Pin	Signal
N/C	1			2	N/C
N/C	3			4	N/C
N/C	5			6	MCKO
EVTI (opt.)	7			8	EVTO (opt.)
SRST- (opt.)	9			10	N/C
TDO	11			12	VREF-TRACE
RTCK (opt.)	13			14	VREF-JTAG
TCK | TCKC	15			16	MDO7_A
TMS | TMSC	17			18	MDO6_A
TDI	19			20	MDO5_A
TRST- (opt.)	21			22	MDO4_A
MDO7_B	23			24	MDO3_A
MDO6_B	25			26	MDO2_A
MDO5_B	27			28	MDO1_A
MDO4_B	29			30	MDO0_A
MDO3_B	31			32	MSEO1_B
MDO2_B	33			34	MSEO0_B
MDO1_B	35			36	MSEO1_A
MDO0_B	37			38	MSEO0_A
Connect Pin 39,40,41,42,43 to GND

VCC needs to have VREF-TRACE level.

Connector "TRACE B"

The second connector is not used.