News - TRACE32 takes Xtensa trace off-chip


The embedded tools company






Höhenkirchen-Siegertsbrunn, 06-Jul-2020


© [Sergey Nivens]/123rf.com

TRACE32 takes Xtensa trace off-chip


Lauterbach is pleased to announce support for off-chip trace for Xtensa. TRACE32 has supported the Xtensa on-chip trace protocol, TRAX, since its inception. However, the off-chip trace allows much longer recording times and thus more comprehensive analyses.

The TRAX protocol is based upon the IEEE-ISTO NEXUS 5001 standard. An updated implementation of TRAX allows it to interface to an implementation of the Arm CoreSightâ„¢ IP. This allows the trace data to be sent to any supported trace sink, for example: ETB/ETF, TPIU or HSSTP. Now, for the first time Xtensa program flow trace can be spooled off-chip via a dedicated trace port, such as one using the Aurora Gigabit Trace Protocol to a high-speed serial trace port. Using the Lauterbach trace tools up to 4 Gigabytes of trace information can be recorded, as opposed to the up to 256 Kbytes of on-chip storage provided by the initial implementation of TRAX. All Lauterbach trace tools support the option of streaming the trace data to a host development machine enabling practically unlimited trace data.

Trace support for Xtensa processor is available immediately. Please contact your nearest Lauterbach representative for more details.



Copyright © 2020 Lauterbach GmbH, Altlaufstr.40, 85635 Höhenkirchen-Siegertsbrunn, Germany   Impressum     Privacy Policy
The information presented is intended to give overview information only.
Changes and technical enhancements or modifications can be made without notice. Report Errors
Last generated/modified: 06-Jul-2020