Pinout Specification IDC20A Debug Cable


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Pinout


ARM compatible 20-pin IDC connector with pins on 0.100" centers
Signal

Pin

 Pin

Signal

    
VREF-DEBUG12VSUPPLY (not used)
TRST-34GND
TDI56GND
TMS|TMSC|SWDIO78GND
TCK|TCKC|SWCLK910GND
RTCK1112GND
TDO1314GND
RESET-1516GND
DBGRQ1718GND
DBGACK1920GND
    
Target connector, top-view

Pin Direction Description
TCK|TCKC|SWCLK to CPU JTAG Clock. It is recommended to put a pull-down to GND on this signal.
TMS to CPU Standard JTAG TMS: It is recommended to put a pull-up to VTREF on this signal for standard 4-pin JTAG.
TMSC to/from CPU Compact JTAG TMSC: Your chip should have a bus-hold on this line for compact JTAG.
SWDIO to/from CPU Serial Wire Debug In/Out
TDI to CPU JTAG TDI. It is recommended to put a pull-up to VTREF on this signal.
Only required for standard 4-pin JTAG / Optional signal for compact JTAG.
TDO from CPU JTAG TDO. (No pull-up or pull-down is required.)
Only required for standard 4-pin JTAG / Optional signal for compact JTAG.
TRST- to CPU JTAG Testport Reset. (Optional, No pull-up or pull-down is required.)
RTCK
from CPU
JTAG Return Clock. (Optional, No pull-up or pull-down is required.)
VREF-DEBUG from CPU Reference voltage. This voltage should indicate the nominal HIGH level for the JTAG and trace pins. So for example, if your signals have a voltage swing from 0 V ... 3.3 V, the VTREF pin should be connected to 3.3 V.
RESET- to/from CPU System Reset Signal. (Optional)
If your target board has a low active CPU reset signal, you can connect this low active reset signal to this pin. This enables the debugger to detect a CPU reset. Furthermore the debugger can drive this pin to GND to hold the CPU in the reset state. The debugger drives this pin as open-drain, so a pull-up is mandatory.
DBGRQ
to CPU
Debug Request(optional). Used with some chips to stop all cores. (Leave open (N/C) if not used)
DBGACK
from CPU
Debug Acknowledge (optional) Indicates on some chips, if the cores are running. (Leave open (N/C) if not used)
 

Dimension


  • This is a standard 20 pin double row (two rows of 10 pins) connector (pin to pin spacing: 2.54mm/0.100").
  • If terminal strip without shroud is used, the spacing marked with "A" must be a minimum of 30.6mm/1.2".
  • Examples with housing: Samtec HTST-110-01-L-D (through-hole); Samtec HTST-110-01-L-DV (surface mount).
  • Examples without housing: Samtec TSW-110-23-L-D; Berg 67996-120H.
 

Interface Standard


The Debug Cable supports different interface standards:

1JTAGIEEE 1149.1alternate pin function: TMS, TCK
3Compact JTAGIEEE 1149.7alternate pin function: TMSC, TCKC
2Serial Wire DebugCoreSight Arm®alternate pin function: SWDIO, SWCLK

The interface type and corresponding pin function can be selected in the debuggers GUI.

 

Converter


Picture
Order No.
Probe
Adapter Half-Size 20 pin
Converter IDC20A to MIPS-14
Converter IDC20A/MIPI-20 to 10-pin ECU14
Converter IDC20A to RISC-V SiFive PMOD12 male
Converter IDC20A to Mictor-38
Converter IDC20A to XTENSA14
Converter IDC20A to MIPI-10/20/34
Converter IDC20A to TI-14/TI-20-Compact
Converter IDC20A to PPC-16
on request, please contact Lauterbach
Converter IDC20A to ALTERA-10/RISCV-10
Converter IDC20A to XILINX-14
Converter IDC20A to Digilent PMOD™




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Last generated/modified: 15-Jan-2024