Pin |
Direction |
Description |
TCK|TCKC|SWCLK |
to CPU |
JTAG Clock. It is recommended to put a pull-down to GND on this signal. |
TMS |
to CPU |
Standard JTAG TMS: It is recommended to put a pull-up to VTREF on this signal for standard 4-pin JTAG. |
TMSC |
to/from CPU |
Compact JTAG TMSC: Your chip should have a bus-hold on this line for compact JTAG. |
SWDIO |
to/from CPU |
Serial Wire Debug In/Out |
TDI |
to CPU |
JTAG TDI. It is recommended to put a pull-up to VTREF on this signal.
Only required for standard 4-pin JTAG / Optional signal for compact JTAG.
|
TDO |
from CPU |
JTAG TDO. (No pull-up or pull-down is required.)
Only required for standard 4-pin JTAG / Optional signal for compact JTAG.
|
VREF-DEBUG |
from CPU |
Reference voltage. This voltage should indicate the nominal HIGH level for the debug signals (JTAG, cJTAG, SWD).
So for example, if your signals have a voltage swing from 0 V ... 3.3 V, the VTREF pin should be connected to 3.3 V.
With the MPI20T pin-out this is also the reference voltage for the trace pins (TRC).
|
RESET- |
to/from CPU |
System Reset Signal. (Optional)
If your target board has a low active CPU reset signal, you can
connect this low active reset signal to this pin.
This enables the debugger to detect a CPU reset.
Furthermore the debugger can drive this pin to GND to hold the CPU in
the reset state. The debugger drives this pin as open-drain,
so a pull-up is mandatory.
|
RTCK |
from CPU |
JTAG Return Clock. (Optional, No pull-up or pull-down is required.) |
TRST- |
to CPU |
JTAG Testport Reset (optional).This is an active low signal. A pull-up on the target is recommended. |
TRST- PULLDOWN |
from CPU |
Test Reset Pull-Down. Same function as nTRST, but with pull-down resistor on target.
This signal is active low and requires a pull-down, if used. However the signal is optional and not recomended.
|
DBGRQ (EMU0) |
to CPU |
Debug Request (optional). Used with some chips to stop all cores. (Leave open (N/C) if not used) |
DBGACK (EMU1) |
from CPU |
Debug Acknowledge (optional) Indicates on some chips, if the cores are running. (Leave open (N/C) if not used) |
TRC CLK |
from CPU |
Trace clock (used with off-chip trace) |
TRC DATA[3..0] |
from CPU |
Trace data (used with off-chip trace) |
TRC EXT |
to/from CPU |
Implementation defined trace sideband signal. Normally not used. (Optional and not recomended, Leave open (N/C)) |
VREF-TRACE |
from CPU |
Reference voltage for the trace signals (TRC). This voltage should indicate the nominal HIGH level for the trace pins. |