Target Adaptation via IDC20A Debug Probe |
![]()
|
|||||
|
||||||
| ||||||
|
![]() |
![]() |
![]() |
![]() |
![]() |
![]() |
![]() |
![]() |
![]() |
![]() Technical Support |
![]() |
| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Signal | Pin | Pin | Signal | ||
|---|---|---|---|---|---|
![]() | |||||
| VREF-DEBUG | 1 | ![]() | ![]() | 2 | VSUPPLY (not used) |
| TRST- | 3 | ![]() | ![]() | 4 | GND |
| TDI | 5 | ![]() | ![]() | 6 | GND |
| TMS|TMSC|SWDIO | 7 | ![]() | ![]() | 8 | GND |
| TCK|TCKC|SWCLK | 9 | ![]() | ![]() | 10 | GND |
| RTCK | 11 | ![]() | ![]() | 12 | GND |
| TDO|-|SWO | 13 | ![]() | ![]() | 14 | GND |
| RESET- | 15 | ![]() | ![]() | 16 | GND |
| DBGRQ | 17 | ![]() | ![]() | 18 | GND |
| DBGACK | 19 | ![]() | ![]() | 20 | GND |
![]() | |||||
| Target connector, top-view | |||||
Signals| Pin | Direction | Description |
|---|---|---|
| TCK|TCKC|SWCLK | to CPU | JTAG Clock. It is recommended to put a pull-down to GND on this signal. |
| TMS | to CPU | Standard JTAG TMS. It is recommended to put a pull-up to VTREF on this signal for standard 4-pin JTAG. |
| TMSC | to/from CPU | Compact JTAG TMSC. Your chip should have a bus-hold on this line for compact JTAG. |
| SWDIO | to/from CPU | Serial Wire Debug In/Out |
| TDI | to CPU | JTAG TDI. It is recommended to put a pull-up to VTREF on this signal. Only required for standard 4-pin JTAG, optional signal for compact JTAG. |
| TDO | from CPU | JTAG TDO. No pull-up or pull-down is required. Only required for standard 4-pin JTAG, optional signal for compact JTAG. |
| TRST- | to CPU | JTAG Test Reset (optional). This is an active low signal. A pull-up on the target is recommended. |
| RTCK | from CPU |
JTAG Return Clock (optional). Available for Arm and a few other architectures. No pull-up or pull-down is required. Leave open (N/C) if not used. |
| VREF-DEBUG | from CPU | Reference voltage. This voltage should indicate the nominal HIGH level the for the debug signals (JTAG, cJTAG, SWD). So for example, if your signals have a voltage swing from 0 V ... 3.3 V, the VTREF pin should be connected to 3.3 V. |
| VSUPPLY | from CPU | Voltage supply. LAUTERBACH debug probes have their own dedicated power supply. As such, this line is not utilized. |
| GND | to/from CPU | Ground. Connect all GND pins to minimize noise interference. |
| RESET- | to/from CPU | System Reset (optional). If your target board has a low active CPU reset signal, you can connect this low active reset signal to this pin. This enables the debugger to detect a CPU reset. Furthermore the debugger can drive this pin to GND to hold the CPU in the reset state. The debugger drives this pin as open-drain, so a pull-up is mandatory. |
| DBGRQ | to CPU |
Debug Request (optional, Arm architecture only). Used with some Arm-based chips to stop all Arm cores. Leave open (N/C) if not used. |
| DBGACK | from CPU |
Debug Acknowledge (optional, Arm architecture only). Indicates on some Arm-based chips, if the Arm cores are running. Leave open (N/C) if not used. |
| EVTI (17) | to CPU |
Nexus Event In (optional, ARC architecture only). Only used with DesignWare ARC Trace to force a Nexus Synchronization Message. |
| EVTO (19) | from CPU |
Nexus Event Out (optional, ARC architecture only). This pin is not used by ARC processors. Leave open (N/C) if not used. |
Interface Standards| 1 | JTAG | IEEE 1149.1 | alternate pin function: TMS, TCK |
| 3 | Compact JTAG | IEEE 1149.7 | alternate pin function: TMSC, TCKC |
| 2 | Serial Wire Debug | CoreSight Arm® | alternate pin function: SWDIO, SWCLK |
| Order No. | Probe |
|---|---|
| LA-2715 | Debugger for Nios® II (20 Pin) |
| LA-2728 | Conv. Bundle Intel MIPI60-Cv2 to ARM 20 |
| LA-2751 | Debugger for STRED (ICD) |
| LA-2757 | JTAG Debugger for Mico32 (ICD) |
| LA-2758 | Debugger for Meta (ICD) |
| LA-2759 | JTAG Debugger for C7000 DSP (ICD) out of production |
| LA-3200 | IDC20A Debug Probe with RISC-V 32-Bit License |
| LA-3201 | IDC20A Debug Probe with RISC-V 64-Bit License |
| LA-3208 | IDC20A Debug Probe with Hexagon License |
| LA-3210 | IDC20A Debug Probe with ARC® License |
| LA-3211 | IDC20A Debug Probe with Xtensa® License |
| LA-3222 | IDC20A Debug Probe with C2000 License |
| LA-3224 | IDC20A Debug Probe with C5400 License |
| LA-3225 | IDC20A Debug Probe with C5500 License |
| LA-3226 | IDC20A Debug Probe with C6000 License |
| LA-3227 | IDC20A Debug Probe with C7000 License |
| LA-3250 | IDC20A Debug Probe with ARM7 License |
| LA-3251 | IDC20A Debug Probe with ARM9 License |
| LA-3252 | IDC20A Debug Probe with ARM11 License |
| LA-3253 | IDC20A Debug Probe with Armv7-A/R License |
| LA-3254 | IDC20A Debug Probe with Cortex-M License |
| LA-3255 | IDC20A Debug Probe with Armv8/v9-A/R License |
| LA-3259 | IDC20A Debug Probe with XScale License |
| LA-3260 | IDC20A Debug Probe with MicroBlaze License |
| LA-3261 | IDC20A Debug Probe with SPARC-V8 License new product |
| LA-3268 | IDC20A Debug Probe with ASIP License |
| LA-3712 | JTAG Debugger for ZSP500 DSP Core (ICD) |
| LA-3741 | JTAG Debugger for Hexagon Core (ICD) out of production |
| LA-3747 | JTAG/SPI Debugger for UBI32 |
| LA-3750 | JTAG Debugger for ARC (ICD) out of production |
| LA-3756 | Debugger for AndesCore™ V3/V2 |
| LA-3762 | JTAG Debugger for Xtensa 20 Pin out of production |
| LA-3774 | JTAG Debugger for TeakLite III (ICD) |
| LA-3793 | JTAG Debugger for Beyond |
| LA-3844 | JTAG Debugger for TeakLite-4 (ICD) |
| LA-7739 | JTAG Debugger for JANUS (ICD) on request, please contact Lauterbach |
| LA-7742 | JTAG Debugger for Arm9 out of production |
| LA-7744 | JTAG Debugger for ARM10 (ICD) on request, please contact Lauterbach |
| LA-7746 | JTAG Debugger for Arm7 20 Pin Connector (ICD) out of production |
| LA-7765 | JTAG Debugger for Arm11 (ICD) out of production |
| LA-7774 | JTAG Debugger for Teak/TeakLite JAM 20 (ICD) |
| LA-7789 | JTAG Debugger for OAK/TeakLite SEIB (ICD) |
| LA-7830 | JTAG Debugger for C5500 DSP (ICD) out of production |
| LA-7831 | JTAG Debugger for TMS320C5400 DSP (ICD) out of production |
| LA-7838 | JTAG Debugger for C6000 DSP (ICD) out of production |
| LA-7845 | JTAG Debugger for StarCore 20 Pin (ICD) |
| LA-7847 | JTAG Debugger for C2000 DSP (ICD) out of production |
| LA-7850 | JTAG Debugger for R8051XC on request, please contact Lauterbach |
| LA-7863 | JTAG Debugger for M8051EW 20 Pins (ICD) |
LA-2729 Converter IDC20A to MIPI-10/20T (Recommended, since easy and robust)
LA-3770 Converter IDC20A to MIPI-10/20D/34 (Use only if you need legacy debug signals RTCK, DBGRQ, DBGACK, TRST-) 
|
Copyright © 2026 Lauterbach GmbH, Altlaufstr.40, 85635 Höhenkirchen-Siegertsbrunn, Germany
Impressum
Privacy Policy
The information presented is intended to give overview information only. Changes and technical enhancements or modifications can be made without notice. Report Errors Last generated/modified: 31-Mar-2026 |